RIFF BOX JTAG firmware/hardware supports communication with single or multichained TAP controllers. All currently supported cores, according to IEEE 1149.1 Test Access Port standard, put 0b1 data into IR register upon CAPTURE state. Thus it makes possible automatic detection of IR register size of each TAP present on the JTAG chain. In this case IR â€˜pre-â€™ and â€˜post-â€™ stuffing bit sizes are not required to be specified by user and are determined automatically. All is needed is a TAP controller position number of the device user is trying to connect to.